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publication# 18411 rev: d amendment: / 0 issue date: october 1999 am79514 subscriber line interface circuit distinctive characteristics programmable constant-current feed programmable loop-detect threshold on-chip switching regulator for low-power dissipation polarity reversal feature optimized for ?60 v battery line feed characteristics independent of battery variations two-wire impedance set by single external impedance tip open state for ground-start lines ring and test relay drivers on-hook transmission block diagram vtx det vreg vbat signal transmission input decoder and control ground-key detector ring relay driver test relay driver off-hook detector power-feed controller ring-trip detector switching regulator testout ringout rd rdc l two-wire a(tip) hpa hpb b(ring) bgnd da db chs qbat chclk vcc vee agnd/dgnd e1 c4 c2 c3 c1 interface rsn ring relay driver
2 am79514 data sheet ordering information standard products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the elements below. note: * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ?40 c to +85 c is guaranteed by characterization and periodic sampling of production units. am79514 j performance grade temperature range c = commercial (0 c to 70 c)* package type j = 32-pin plastic leaded chip carrier (pl 032) am79514 subscriber line interface circuit ?1 = performance grading ?2 = performance grading c device number/description ? 1 valid combinations valid combinations list configurations planned to be supported in volume for this device. consult the local amd sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on amd ? s standard military grade products. valid combinations am7951x ? 1 jc ? 2
slic products 3 connection diagrams top view notes: 1. pin 1 is marked for orientation. 2. tp is a thermal conduction pin tied to substrate. tp testout l c4 vbat qbat chs chclk e1 ringout bgnd b(ring) a(tip) db dgnd 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 4 3 2 1 32 31 30 vcc c1 rdc c3 c2 e0 tp da rd hpb hpa vtx vee rsn agnd vreg det am79514
4 am79514 data sheet pin descriptions pin names type description agnd gnd analog ground. a(tip) output output of a(tip) power amplifier. bgnd gnd battery (power) ground. b(ring) output output of b(ring) power amplifier. c3 ? c1 inputs decoder. ttl compatible. c3 is msb and c1 is lsb. c4 input test relay driver command. ttl compatible. a logic high enables the driver. dgnd gnd digital ground. chclk input chopper clock. input to switching regulator (ttl compatible) frequency = 256 khz (nominal). chs input chopper stabilization. connection for external stabilization components. da input ring-trip negative. negative input to ring-trip comparator. db input ring-trip positive. positive input to ring-trip comparator. det output detector. when enabled, a logic low indicates that the selected detector is tripped. the detector is selected by the logic inputs (c3 ? c1 and e1). the output is open-collector with a built-in 15 k ? pull-up resistor. e0 input read enable. a logic high enables det . a logic low disables det . e1 input ground key enable. e1 = high connects the ground-key detector to det , and e1 = low connects the off-hook or ring-trip detector to det . hpa capacitor high-pass filter capacitor. a(tip) side of high-pass filter capacitor. hpb capacitor high-pass filter capacitor. b(ring) side of high-pass filter capacitor. l output switching regulator power transistor. connection point for filter inductor and anode of catch diode. this pin will have up to 60 v of pulse waveform on it and must be isolated from sensitive circuits. extreme care must be taken to keep the diode connections short because of the high currents and high di/dt. qbat battery quiet battery. filtered battery supply for the signal processing circuits. an external 100 ? , 1/8 ? resistor must be connected between qbat and vbat pins. rd resistor detect resistor. threshold modification and filter point for the off-hook detector. rdc resistor dc feed resistor. connection point for the dc feed current programming network. the other end of the network connects to the receiver summing node (rsn). the sign of v rdc is negative for nor- mal polarity and positive for reverse polarity. ringout output ring relay driver. sourcing from bgnd with internal diode to qbat. rsn input receive summing node. the metallic current (both ac and dc) between a(tip) and b(ring) is equal to 1000 times the current into this pin. the networks that program receive gain, two-wire impedance, and feed current all connect to this node. this node is extremely sensitive. care should be taken to route the 256-khz chopper clock and switch lines away from the rsn node. testout output test relay driver. sourcing from bgnd with internal diode to qbat. tp thermal thermal pin. connection for heat dissipation. internally connected to substrate (qbat). leave as open circuit or connected to qbat. in both cases, the tp pins can connect to an area of copper on the board to enhance heat dissipation. vbat battery battery supply. vcc power +5 v power supply. vee power ? 5 v power supply. vreg input regulated voltage. provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. vtx output transmit audio. this output is a unity gain version of the a(tip) and b(ring) metallic voltage. the other end of the two-wire input impedance programming network connects here.
slic products 5 absolute maximum ratings storage temperature ......................... ? 55 c to +150 c v cc with respect to agnd/dgnd ..... ? 0.4 v to +7.0 v v ee with respect to agnd/dgnd...... +0.4 v to ? 7.0 v v bat with respect to agnd/dgnd ..... +0.4 v to ? 70 v note: rise time of v bat (dv/dt) must be limited to 27 v/ s or less when q bat bypass = 0.33 f. bgnd with respect to agnd/dgnd.. +1.0 v to ? 3.0 v a(tip) or b(ring) to bgnd: continuous .................................... ? 70 v to +1.0 v 10 ms (f = 0.1 hz) .......................... ? 70 v to +5.0 v 1 s (f = 0.1 hz) .............................. ? 90 v to +10 v 250 ns (f = 0.1 hz) ........................ ? 120 v to +15 v current from a(tip) or b(ring) ....................... 150 ma voltage on ringout ....... bgnd to 70 v above q bat voltage on testout ....... bgnd to 70 v above q bat current through relay drivers .............................60 ma voltage on ring-trip inputs da and db .......v bat to 0 v current into ring-trip inputs .................................. 10 ma peak current into regulator switch (l pin) ........150 ma switcher transient peak off voltage on l pin ......+1.0 v c4 ? c1, e1, chclk, to agnd/dgnd .................... ? 0.4 v to v cc + 0.4 v maximum power dissipation, (see note) ...... t a = 70 c in 32-pin plcc package..............................1.74 w note: thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165 c. the device should never be exposed to this temperature. operation above 145 c junction temperature may degrade device reliability. see the slic packaging considerations for more information. stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability. operating ranges commercial (c) devices ambient temperature .............................0 c to +70 c* v cc .....................................................4.75 v to 5.25 v v ee ................................................. ? 4.75 v to ? 5.25 v v bat ...................................................... ? 40 v to ? 63 v agnd/dgnd .......................................................... 0 v bgnd with respect to agnd/dgnd........................ ? 100 mv to +100 mv load resistance on vtx to ground .............. 10 k ? min operating ranges define those limits between which the functionality of the device is guaranteed. * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ? 40 c to +85 c is guaranteed by characterization and periodic sampling of production units.
6 am79514 data sheet electrical characteristics description test conditions (see note 1) min typ max unit note analog (v tx ) output impedance 3 20 w analog (v tx ) output offset 0 c to +70 c ? 40 c to +85 c ? 35 ? 40 +35 +40 mv ? 4 analog (rsn) input impedance 300 hz to 3.4 khz 1 20 w longitudinal impedance at a or b 35 overload level z 2win = 600 ? to 900 ? 4-wire 2-wire ? 3.1 ? 3.1 +3.1 +3.1 vpk 2 ? transmission performance, 2-wire impedance 2-wire return loss (see test circuit d) 300 hz to 500 hz 500 hz to 2500 hz 2500 hz to 3400 hz 26 26 20 db 4 ? ? longitudinal balance (2-wire and 4-wire, see test circuit c) longitudinal to metallic l-t, l-4 200 hz to 1 khz: ? 1* normal polarity 0 c to +70 c ? 2 normal polarity ? 40 c to+85 c ? 2 reverse polarity ? 2 50 63 58 58 db 5 1 khz to 3.4 khz: ? 1* normal polarity 0 c to +70 c ? 2 normal polarity ? 40 c to +85 c ? 2 reverse polarity ? 2 52 58 54 54 longitudinal sum (l-t) + (t-l) 300 to 3400 hz 95 longitudinal signal generation 4-l or t-l 300 to 800 hz 800 to 3400 hz 40 35 longitudinal current capability per wire active state oht state 17 8 marms insertion loss (2- to 4-wire and 4- to 2-wire, see test circuits a and b) gain accuracy 0 dbm, 1 khz, 0 c to +70 c 0 dbm, 1 khz, ? 40 c to +85 c 0 dbm, 1 khz, 0 c to +70 c ? 1* 0 dbm, 1 khz, ? 40 c to +85 c ? 1 ? 0.15 ? 0.20 ? 0.1 ? 0.15 +0.15 +0.20 +0.1 +0.15 db 4 4 variation with frequency 300 hz to 3400 hz relative to 1 khz 0 c to +70 c ? 40 c to +85 c ? 0.1 ? 0.15 +0.1 +0.15 4 gain tracking +7 dbm to ? 55 dbm 0 c to +70 c ? 40 c to +85 c ? 0.1 ? 0.15 +0.1 +0.15 note: * p.g. = performance grade
slic products 7 balance return signal (4-wire to 4-wire, see test circuit b) gain accuracy 0 dbm, 1 khz, 0 c to +70 c 0 dbm, 1 khz, ? 40 c to +85 c 0 dbm, 1 khz, 0 c to +70 c ? 1* 0 dbm, 1 khz, ? 40 c to +85 c ? 1 ? 0.15 ? 0.20 ? 0.1 ? 0.15 +0.15 +0.20 +0.1 +0.15 db 4 4 variation with frequency 300 hz to 3400 hz relative to 1 khz 0 c to +70 c ? 40 c to +85 c ? 0.1 ? 0.15 +0.1 +0.15 4 gain tracking +7 dbm to ? 55 dbm 0 c to +70 c ? 40 c to +85 c ? 0.1 ? 0.15 +0.1 +0.15 group delay f = 1 khz 5.3 s total harmonic distortion (2- to 4-wire or 4- to 2-wire, see test circuits a and b) distortion level 0 dbm, 300 hz to 3400 hz ? 64 ? 50 db distortion level +9 dbm ? 55 ? 40 idle channel noise psophometric weighted noise 2-wire 0 c to +70 c 2-wire ? 40 c to +85 c ? 83 ? 83 ? 78 ? 75 dbmp 7 4, 7 4-wire 0 c to +70 c 4-wire ? 40 c to +85 c ? 83 ? 83 ? 78 ? 75 7 4, 7 single frequency out-of-band noise (see test circuit e) metallic 4 khz to 9 khz 9 khz to 1 mhz 256 khz and harmonics ? 76 ? 76 ? 57 dbm 4, 5, 9 4, 5 longitudinal 1 khz to 15 khz above 15 khz 256 khz and harmonics ? 70 ? 85 ? 57 4, 5, 9 4, 5 dc feed current and voltage (see figure 1) unless otherwise noted, battery = 60 v (v bat = ? 59.3 v) active state loop-current accuracy i loop (nominal) = 40 ma r l = 2000 ? , battery = 62 v ? 1* r l = 2080 ? ? 2 ? 7.5 23 22.7 +7.5 % ma ma 4 on-hook loop voltage r l = 47.5 49 v oht state tip open state disconnect state r l = 600 ? r l = 600 ? r l = 0 18 20 22 1.0 1.0 ma power dissipation, battery = ? 60 v on-hook open circuit state on-hook oht state on-hook active state off-hook oht state off-hook active state r l = 600 ? r l = 600 ? 50 175 260 500 650 120 250 400 750 1000 mw electrical characteristics (continued) description test conditions (see note 1) min typ max unit note
8 am79514 data sheet supply currents v cc on-hook supply current open circuit state oht state active state 3 6 7.5 4.5 10 12 ma v ee on-hook supply current open circuit state oht state active state 1.0 2.2 2.7 2.3 3.5 6.0 v bat on-hook supply current open circuit state oht state active state 0.4 3.0 4.0 1.0 5.0 6.0 power supply rejection ratio (v ripple = 50 mvrms) v cc 40 hz to 3400 hz 3.4 khz to 50 khz 20 20 35 30 db 6, 7 ? v ee 40 hz to 3400 hz 3.4 khz to 50 khz 20 15 30 25 6, 7 ? v bat 40 hz to 3400 hz 3.4 khz to 50 khz 27 20 30 30 6, 7 ? off-hook detector current threshold i det = 365/r d ? 20 +20 % ground-key detector thresholds active state, battery = ? 60 v ground-key resistance threshold b(ring) to gnd 2.0 4.2 10.0 k ? ground-key current threshold b(ring) or midpoint to gnd 9 ma 8 ring-trip detector input bias current ? 5 ? 0.05 a offset voltage source resistance = 0 to 200 k ? ? 50 0 +50 mv logic inputs (c4 ? c1, e1, and chclk) input high voltage 2.0 v input low voltage 0.8 a input high current all inputs except e1 input e1 ? 75 ? 75 40 45 input low current ? 0.4 ma logic output (det ) output low voltage i out = 0.8 ma 0.4 v output high voltage i out = ? 0.1 ma 2.4 relay driver outputs (ringout, testout) on voltage 50 ma source b gnd ? 2 v off leakage 0.5 100 a clamp voltage 50 ma sink q bat ? 2 v electrical characteristics (continued) description test conditions (see note 1) min typ max unit note
slic products 9 relay driver schematics switching characteristics symbol parameter test conditions temperature ranges min typ max unit note tgkde e1 low to det high (e0 = 1) e1 low to det low (e0 = 1) ground-key detect state r l open, r g connected (see figure h) 0 c to +70 c ? 40 c to +85 c 0 c to +70 c ? 40 c to +85 c 3.8 4.0 1.1 1.6 s 4 tgkdd e0 high to det low (e1 = 0) 0 c to +70 c ? 40 c to +85 c 1.1 1.6 tgkd0 e0 low to det high (e1 = 0) 0 c to +70 c ? 40 c to +85 c 3.8 4.0 tshde e1 high to det low (e0 = 1) e1 high to det high (e0 = 1) switchhook detect state r l = 600 ? , r g open (see figure g) 0 c to +70 c ? 40 c to +85 c 0 c to +70 c ? 40 c to +85 c 1.2 1.7 3.8 4.0 tshdd e0 high to det low (e1 = 1) 0 c to +70 c ? 40 c to +85 c 1.1 1.6 tshd0 e0 low to det high (e1 = 1) 0 c to +70 c ? 40 c to +85 c 3.8 4.0 testout bgnd q bat ringout q bat bgnd
10 am79514 data sheet switching waveforms notes: 1. unless otherwise noted, test conditions are bat = ? 60 v, v cc = +5 v, v ee = ? 5 v, r l = 600 ?, c hp = 0.33 f, r dc1 = r dc2 = 31.25 k ? , c dc = 0.1 f, rd = 51.1 k ? , no fuse resistors, two-wire ac output impedance programming impedance (z t ) = 600 k ? resistive, receive input summing impedance (z rx ) = 300 k ? resistive. (see table 2 for component formulas.) 2. overload level is defined when thd = 1%. 3. balance return signal is the signal generated at v tx by v rx . this specification assumes that the two-wire ac load impedance matches the impedance programmed by z t . 4. not tested in production. this parameter is guaranteed by characterization or correlation to other tests. 5. these tests are performed with a longitudinal impedance of 90 ? and metallic impedance of 300 ? for frequencies below 12 khz and 135 ? for frequencies greater than 12 khz. these tests are extremely sensitive to circuit board layout. please refer to application notes for details. 6. this parameter is tested at 1 khz in production. performance at other frequencies is guaranteed by characterization. 7. when the slic is in the anti-sat 2 operating region, this parameter is degraded. the exact degradation depends on system design. the anti-sat 2 region occurs at high loop resistances when |v bat | ? |v ax ? v bx | is less than approximately 15 v. 8. ? midpoint ? is defined as the connection point between two 300 ? series resistors connected between a(tip) and b(ring). 9. fundamental and harmonics from 256 khz switch regulator chopper are not included. det tgkde tshde tgkde tshde det tshdd tshd0 tgkd0 tgkdd e1 e1 to det e0 to det e0 e1 note: all delays measured at 1.4 v level.
slic products 11 table 1. slic decoding det output state c3 c2 c1 two-wire status e1 = 0 e1 = 1 0 0 0 0 open circuit ring trip ring trip 1 0 0 1 ringing ring trip ring trip 2 0 1 0 active loop detector ground key 3 0 1 1 on-hook tx (oht) loop detector ground key 4 1 0 0 tip open loop detector ? 5 1 0 1 reserved loop detector ? 6 1 1 0 active polarity reversal loop detector ground key 7 1 1 1 oht polarity reversal loop detector ground key table 2. user-programmable components where z t is connected between the vtx and rsn pins. the fuse resistors are r f , and z 2win is the desired 2-wire ac input impedance. when computing z t , the internal current amplifier pole and any external stray capacitance between vtx and rsn must be taken into account. where z rx is connected from v rx to the rsn pin, z t is defined above, g 42l is the desired receive gain, and z l is the 2-wire load impedance. where r dc1 , r dc2 , and c dc form the network c dc = (1.5 ms)(r dc1 + r dc2 )/(r dc1 ? r dc2 ) connected to the rdc pin. r dc1 and r dc2 are approximately equal. where r d and c d form the network connected from rd to ? 5v and i t is the threshold current between on hook and off hook. z t 1000 z 2win 2r f ? () = z rx z l g 42l ----------- 1000 z t ? z t 1000 z l 2r f + () + ---------------------------------------------------- ? = r dc1 r dc2 2500 i feed ------------- = + r d 365 i t -------- - c d 0.5 ms r d ---------------- - = , =
12 am79514 data sheet dc feed characteristics notes: 1. constant-current region: active state, oht state, 2. anti-sat cut-in: 3. open circuit voltage: 4. anti-sat 1 region: 5. anti-sat 2 region: i l 2500 r dc ----------- - = i l 1 2 -- - 2500 r dc ----------- - ? = v ab 46 v, = v bat 58.9 v v ab 1.087 v bat 18.017, ? = v bat 58.9 v < v ab 51.23 v, = v bat 61.5 v v ab 1.073 v bat 14.72, ? = v bat 61.5 v < v ab 51.23 i l r dc 488.3 ------------- ? = v ab 1.073 v bat 14.72 ? i l r dc 1071 ----------- - ? = 3 4 1 1 2 r dc = 62.5 k ? v bat = 62.3 v a. v a ? v b (v ab ) voltage vs. loop current (typical) active state oht state
slic products 13 dc feed characteristics (continued) a b i l rsn rdc r dc1 r dc2 c dc slic r l a b feed current programmed by r dc1 and r dc2 c. feed programming figure 1. dc feed characteristics r dc = 62.5 k ? v bat = 62.3 v b. loop current vs. load resistance (typical)
14 am79514 data sheet test circuits v rx r rx b (ring) a (tip) r t r r v m z in z d v s b(ring) a (tip) rsn agnd vtx r rx r t s2 open, s1 closed l-t long. bal. = 20 log (v ab / v l ) l-4 long. bal. = 20 log (v tx / v l ) s2 closed, s1 open 4-l long. sig. gen. = 20 log (v l / v rx ) c. longitudinal balance i l2 ? 4 = 20 log (v tx / v ab ) b(ring) a. two- to four-wire insertion loss a (tip) a (tip) slic slic slic slic note: zd is the desired impedance (e.g., the characteristic impedance of the line). r l = ? 20 log (2 v m / v s ) b. four- to two-wire insertion loss and balance return signal vtx vtx vtx b (ring) rsn rsn rsn r l 2 v l r l 2 v ab v l r t r rx v ab r l agnd i l4 ? 2 = 20 log (v ab / v tx ) brs = 20 log (v tx / v ab ) s1 c r l 2 1 c << r l v l r l 2 r t r rx s2 v rx d. two-wire return loss test circuit agnd
slic products 15 test circuits (continued) idc 56 ? 68 ? 68 ? c << 90 ? e. single-frequency noise a(tip) b(ring) slic c s m r l r l r e s e a(tip) b(ring) current feed v cc 6.2 k ? 15 pf a(tip) b(ring) r l = 600 ? r g = 3.9 k ? det f. ground-key detection g. loop-detector switching h. ground-key switching e1 or ground key a(tip) b(ring) 1 c
16 am79514 data sheet physical dimension pl032 revision summary revision a to revision b minor changes were made to the data sheet style and format to conform to amd standards. revision b to revision c in pin description table, inserted/changed tp pin description to: ? thermal pin. connection for heat dissipation. internally connected to substrate (qbat). leave as open circuit or connected to qbat. in both cases, the tp pins can connect to an area of copper on the board to enhance heat dissipation. ? minor changes were made to the data sheet style and format to conform to amd standards. revision c to revision d the physical dimension (pl032) was added to the physical dimension section. deleted the ceramic dip and plastic dip part (am79512) and references to them. updated pin description table to correct inconsistencies. .050 ref. .026 .032 top view pin 1 i.d. .485 .495 .447 .453 .585 .595 .547 .553 16-038fpo-5 pl 032 da79 6-28-94 ae side view seating plane .125 .140 .009 .015 .080 .095 .042 .056 .013 .021 .400 ref. .490 .530
slic products 17 the contents of this document are provided in connection with advanced micro devices, inc. ("amd") products. amd makes no repre sentations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make c hanges to speci- fications and product descriptions at any time without notice. no license, whether express, implied, arising by estoppel or oth erwise, to any in- tellectual property rights is granted by this publication. except as set forth in amd ? s standard terms and conditions of sale, amd assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, th e implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. amd ? s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant i nto the body, or in other applications intended to support or sustain life, or in any other application in which the failure of amd ? s product could create a situation where personal injury, death, or severe property or environmental damage may occur. amd reserves the right to discont inue or make changes to its products at any time without notice. ? 1999 advanced micro devices, inc. all rights reserved. trademarks amd, the amd logo and combinations thereof are trademarks of advanced micro devices, inc. product names used in this publication are for identification purposes only and may be trademarks of their respective companies .

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